DK Digital AVR-500 Arkusz Danych

Dept. of Computer Science University of Copenhagen • Universitetsparken 1 DK-2100 Copenhagen • Denmark HogthrobV0 Users Manual Martin Leopold

(a) Motherboard (Picture and annotation by Kashif Virk)(b) LayoutFigure 2.2 Hogthrob prototype platform HogthrobV0.9

(a) J5 power connector (b) J1 programming connectorFigure 2.3 Power and programming cables2.1.2 ProgrammingConnector J1 combines programming interface

be connected to a PC.Some programmer boards such as the Atmel STK-5003feature built in level conversion,however using a USB-RS232 converter can be con

Line Radio Board AVR FPGARXD1 J1, pin 31 PD2 (RXD1/INT2) FPGA IO17TXD1 J1, pin 32 PD3 (TXD1/INT3) FPGA IO18CLK (SCK) CLK1 PB1 (CLK) FPGA IO13MOSI+MISO

2.2.4 FPGA IOLine Bank Pin ConnectorFPGA AIO0 B6 K1 J2, pin 5FPGA AIO1 B6 R1 J2, pin 7FPGA AIO2 B6 P1 J2, pin 9FPGA AIO3 B6 P2 J2, pin 11FPGA AIO4 B6

Chapter 3Xilinx FPGAThe FPGA portion of the platform is controlled by the ATMega in a number of ways. The AT-Mega powers the FPGA on and off and point

3.1.3 Clock SourceThe FPGA has two external crystal clock sources: a 4 MHz and a 48 MHz source. The 4 MHzclock is always enabled, but the 48 MHz must

requires you to run the installer as root.The installer is provided for Red Hat Linux, but it should work perfectly on most otherdistributions, except

3.2.2 ModelSimIn addition to ISE it might be useful to simulate a project for debugging. For this purpose Xilinxprovides ModelSim Xilinx Edition-III f

Chapter 4ATMegaIn this section we will concern our selves with programming the features of the HTV0 boarddealing with the ATMega. We will present prog

HogthrobV0Users Manualversion 0.3September 24, 2007Martin LeopoldDepartment of Computer science, University of CopenhagenTechnical Report no. 07/05ISS

Extended fuse 0xFF M103C OFF, WDTON OFFHigh fuse0x00 OCDEN ON, JTAGEN ON, SPIEN ON, CKOPT ON,EESAVE ON, BOOTSZ1 ON, BOOTSZ0 ON, BOOTRST OFFLow fuse0x8

DCDC−On VccVcoVccATMega FPGAFigure 4.2 FPGA to ATMega interconnect. Each I/O pin of the FPGA is connected with two diodesfor Electro-Static Discharge

MCUCR &= ˜_BV(SRW10); // No wait-statesXMCRA = 0; // No wait-statesXMCRB = _BV(XMBK) | _BV(XMM0) | _BV(XMM1) |_BV(XMM2);// 32 kB address space w.

typedef struct \{unsigned int rx_en : 1; // RX or TX operationunsigned int rf_ch : 7; // Channel frequencyunsigned int rf_pwr : 2; // RF output poweru

lines — one outbound register and one inbound register. A transmission is initiated by puttinga byte in the outbound register, starting the clock gene

HPLUARTsendDonedataReadynRFSPITimerLED’sHPLADCfiredsetOndataReadysamplePortOffprintgetStdOutsendgetsendShockConfigrxModetxModesendPktApplicationenable

In addition to this the ATMega128l based Mica variants and BTNode2 share the commonmeta platform avrmote — this platform provides only functionality r

interface nRFSPI {command void enableSPIMaster();/*Set up the nRF2401 in rx mode and provide a buffer for reception*The buffer must be atleast as big

Chapter 5TestingThe goal of the following tests is to ensure that all the external interfaces (pin headers) and theon-board connections to the LED’s,

nRF2400 Set one node as RX and one as TX and try to make them communicateThe tests should be performed in the following order:The test sets the Bus-Sw

Revision History0.1 Apr. 2006 Initial version0.2 Oct. 2006 Pin definitions0.3 Sep. 2007 Restructured

5.1.5 ATMega push-buttonsTest the ATMega push button (AVR - Push-Button).1. Test that the on-board Push-Button is connected to the AVR (PE7)2. Upload

5.2.1 PROM Programming (Upload)Test JTAG and PROM-lines.1. Connect JTAG and upload a configuration.2. Read it back and see that the two are the same.5.

5.2.5 AVR→FPGATest that all the data and the control lines are working and that the FPGA can interrupt the AVR.The FPGA is connected to the AVR using

Appendix ASchematics32

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Contents1 The Hogthrob Prototype Platform 51.1 Further Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Hogthrob

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5544332211D DC CB BA ADevice code0x0 no dev0x1 nRF24010x0 NC0x0 NCPower connectorhardware\radio_module\schmatic<Doc>IMM Hogthrob radio moduleA41

Appendix BErrataThis chapter contains an errata from the HogthrobV0 Platform and Associated Documentation.• LED on MB and comm. board have different s

B.2 Bill of Components• L3 might be changed to Murata LQH32CH15M11l (check index.htm)• The actual FLASH memory for the FPGA is unclear (stykliste and

Appendix CFPGA control.c# define AVR ATmega128 1# define FALSE 0# define TRUE 1# include <avr/i o . h># in clude <avr/ s i g n a l . h># i

TOSH ASSIGN PIN(UART TXD0 , E , 1 ) ;TOSH ASSIGN PIN(UART RXD1, D, 2 ) ;TOSH ASSIGN PIN(UART TXD1 , D, 3 ) ;/ ∗ The FPGA i s c o n n e c t e d t o t h

TOSH CLR FPGA CS PIN ( ) ; / / Doesn ’ t m at t e rwhile ( ! TOSH READ FPGA DONE PIN ( ) ) { } ;}void FPGA off ( ) {TOSH MAKE FPGA ON OUTPUT ( ) ;TOSH

setMuxToAVR ( ) ;muxToAVR=TRUE;}}/ ∗ ∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗ ∗∗ LED TEST ∗∗ ∗∗ ∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗

4.3.4 Direct Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244.4 TinyOS . . . . . . . . . . . . . . . . . . . . . . . .

TOSH MAKE MB LED OUTPUT ( ) ;TOSH MAKE RadioD1 LED OUTPUT ( ) ;TOSH MAKE RadioD2 LED OUTPUT ( ) ;/ / S t a r t wi th LEDs onledsOn=TRUE;TOSH SET MB LE

Appendix Dexample.ucf# Clock i n t e r f a c e sNET ” c l k 4 0 e n \” LOC = ”R10” ; # Clock enable f o r 40 MHz c loc kNET ” clk 40mhz ” LOC = ” r9 ”

NET ”WRI” LOC = ” t 3 ” ;NET ”FPGA INT6” LOC = ”N5” ;NET ”FPGA CS” LOC = ”P7” ;NET ”DONE” LOC = ”B14” ;# FPGA<−>Flash I n t e r f a c eNET ”Aout

# FPGA<−>Radio I n t e r f a c eNET ”FPGA IO0” LOC =”P15” ;NET ”FPGA IO1” LOC =”P14” ;NET ”FPGA IO2” LOC =”N16” ;NET ”FPGA IO3” LOC =”N15” ;NET

NET ” BIO 0 ” LOC =”G2” ; # J4 , pin 5NET ” BIO 1 ” LOC =”C1” ; # J4 , pin 7NET ” BIO 2 ” LOC =”B1” ; # J4 , pin 9NET ” BIO 3 ” LOC =”C2” ; # J4 , pin

Appendix EFPGA Makefile## X i l i n x f p g a t o o l fl o wTOPDIR = ./XDIR := $ ( s h e l l i f [ −x ”/usr/cad/ X i l i n x ” ] ; then echo ”/usr/cad/

XSTSCRIPT = $ ( PROJECT ) . xs td e f a u l t :echo $ (XSTWORK)echo $ (SOURCES). PRECIOUS : %.ngc %.ngc %.ngd %.map . ncd %. b i t %.par . ncd %cmdi f

%.mcs : %. b i t$ (PROMGEN) −o $@ −w −p mcs −u 0 $<%.cmd : %. b i t> $@echo ”setMode −bs ” >> $@echo ” se tC abl e −p parport0 ” >>

Bibliography[1] Bootstrap demo design - users manual. URL http://www.oregano.at/ip/mc8051/mc8051_bootstrap_ug.pdf.[2] Atmel. Atmega128(l) complete. UR

Chapter 1The Hogthrob Prototype PlatformThe Hogthrob prototype platform (HogthrobV0) must serve as a development platform through-out the Hogthrob pro

• A low-power timer• Add on-board with wireless communication• Add on-board with sensors• The ability be battery poweredWe choose to implement these g

Chapter 2HogthrobV0 OverviewThe functionality of the platform can be divided into four closely interacting subsystems: com-puting, sensing, communicat

Sensor Board Radio Board Sensors ATMega 128L Comp A/D AVR Processor Core Program Flash 128 KB SRAM 4KB nRF2401 Spartan3 XC3S400 Baseband Processing Lo